Flexible organic transistors with controlled nanomorphology

ABSTRACT

An organic device, including semiconducting polymers processed from a solution cast on one or more dielectric layers on a substrate; and electrical contacts to the semiconducting polymers, wherein the substrate and the one or more dielectric layers are flexible and the semiconducting polymers are aligned. The one or more dielectric layers can increase mobility of the semiconducting polymers and/or alignment of the semiconducting polymers with one or more of the nanogrooves in the dielectric layers.

CROSS REFERENCE TO RELATED APPLICATIONS

This application claims the benefit under 35 U.S.C. Section 119(e) ofcommonly-assigned U.S. Provisional Application Ser. No. 62/193,909 filedon Jul. 17, 2015 by Byoung Hoon Lee and Alan J. Heeger, entitled“FLEXIBLE ORGANIC TRANSISTORS WITH CONTROLLED NANOMORPHOLOGY”, whichapplication is incorporated by reference herein.

This application is related to the following commonly-assigned U.S.patent applications:

U.S. Provisional Patent Application No. 62/338,866, filed May 19, 2016,by Michael J. Ford, Hengbin Wang, and Guillermo Bazan, entitled “ORGANICSEMICONDUCTOR SOLUTION BLENDS FOR SWITCHING AMBIPOLAR TRANSPORT TON-TYPE TRANSPORT,”;

U.S. Provisional Patent Application No. 62/327,311, filed Apr. 25, 2016,by Guillermo Bazan and Ming Wang, entitled “NOVEL WEAK DONOR-ACCEPTORCONJUGATED COPOLYMERS FOR FIELD-EFFECT TRANSISTOR APPLICATIONS,”;

U.S. Provisional Patent Application No. 62/276,145, filed Jan. 7, 2016,by Michael J. Ford and Guillermo Bazan, entitled “STABLE ORGANICFIELD-EFFECT TRANSISTORS BY INCORPORATING AN ELECTRON-ACCEPTINGMOLECULE,”;

U.S. Provisional Patent Application No. 62/253,975, filed Nov. 11, 2015,by Ming Wang and Guillermo Bazan, entitled “FLUORINE SUBSTITUTIONINFLUENCE ON BENZO[2,1,3]THIODIAZOLE BASED POLYMERS FOR FIELD-EFFECTTRANSISTOR APPLICATIONS,”;

U.S. Provisional Patent Application No. 62/263,058, filed Dec. 4, 2015,by Byoung Hoon Lee, Ben B. Y. Hsu, Chan Luo, Ming Wang, Guillermo Bazan,and Alan J. Heeger, entitled “SEMICONDUCTING POLYMERS WITH MOBILITYAPPROACHING ONE HUNDRED SQUARE CENTIMETERS PER VOLT PER SECOND,”;

U.S. Provisional Patent Application No. 62/214,076, filed Sep. 3, 2015,by Byoung Hoon Lee and Alan J. Heeger, entitled “DOPING-INDUCED CARRIERDENSITY MODULATION IN POLYMER FIELD EFFECT TRANSISTORS,”;

U.S. Provisional Patent Application No. 62/207,707, filed Aug. 20, 2015,by Michael Ford and Guillermo Bazan, entitled “HIGH MOBILITY POLYMERORGANIC FIELD-EFFECT TRANSISTORS BY BLADE-COATING SEMICONDUCTOR:INSULATOR BLEND SOLUTIONS,”;

U.S. Provisional Patent Application No. 62/262,025, filed Dec. 2, 2015,by Michael Ford and Guillermo Bazan, entitled “HIGH MOBILITY POLYMERORGANIC FIELD-EFFECT TRANSISTORS BY BLADE-COATING SEMICONDUCTOR:INSULATOR BLEND SOLUTIONS,”;

U.S. Utility patent application Ser. No. 15/058,994, filed Mar. 2, 2016,by Shrayesh N. Patel, Edward J. Kramer, Michael L. Chabinyc, Chan Luoand Alan J. Heeger, entitled “BLADE COATING ON NANOGROOVED SUBSTRATESYIELDING ALIGNED THIN FILMS OF HIGH MOBILITY SEMICONDUCTING POLYMERS,”,which Application claims the benefit under 35 U.S.C. Section 119(e) ofU.S. Provisional Patent Application No. 62/127,116, filed Mar. 2, 2015,by Shrayesh N. Patel, Edward J. Kramer, Michael L. Chabinyc, Chan Luoand Alan J. Heeger, entitled “BLADE COATING ON NANOGROOVED SUBSTRATESYIELDING ALIGNED THIN FILMS OF HIGH MOBILITY SEMICONDUCTING POLYMERS,”;

U.S. Utility patent application Ser. No. 14/585,653, filed on Dec. 30,2014, by Chan Luo and Alan Heeger, entitled “HIGH MOBILITY POLYMER THINFILM TRANSISTORS WITH CAPILLARITY MEDIATED SELF-ASSEMBLY”, whichapplication claims the benefit under 35 U.S.C. Section 119(e) of U.S.Provisional Patent Application Ser. No. 61/923,452, filed on Jan. 3,2014, entitled “HIGH MOBILITY POLYMER THIN FILM TRANSISTORS WITHCAPILLARITY MEDIATED SELF-ASSEMBLY,”;

U.S. Utility patent application Ser. No. 14/426,467, filed on Mar. 6,2015, by Hsing-Rong Tseng, Lei Ying, Ben B. Y. Hsu, Christopher J.Takacs, and Guillermo C. Bazan, entitled “FIELD-EFFECT TRANSISTORS BASEDON MACROSCOPICALLY ORIENTED POLYMERS,” which application claims thebenefit under 35 U.S.C. § 365 of PCT International patent applicationserial no. PCT/US13/058546 filed Sep. 6, 2013, which application claimsthe benefit under 35 U.S.C. Section 119(e) of U.S. Provisional PatentApplication Ser. No. 61/698,065, filed on Sep. 7, 2012, and 61/863,255,filed on Aug. 7, 2013, entitled “FIELD-EFFECT TRANSISTORS BASED ONMACROSCOPICALLY ORIENTED POLYMERS,”;

all of which applications are incorporated by reference herein.

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH AND DEVELOPMENT

This invention was made with Government support under Grant Nos. DMR0856060 and DMR 1436263 awarded by the National Science Foundation toAlan J. Heeger. The Government has certain rights in this invention.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates to a method and device for controlling morphologyof semiconducting polymers, methods for fabricating flexible devices,and flexible devices such as flexible Organic Field Effect Transistors(OFETs).

2. Description of the Related Art

(Note: This application references a number of different publications asindicated throughout the specification by one or more reference numbersin superscripts. A list of these different publications orderedaccording to these reference numbers can be found below in the sectionentitled “References.” Each of these publications is incorporated byreference herein.)

Flexible organic field-effect transistors (OFETs) based onsolution-processed semiconducting polymers and polymer dielectrics areof considerable interest for state-of-the-art flexible “PlasticElectronics”¹⁻⁶. However, charge carrier mobilities have remained belowindustrial requirements due to the difficulty of aligning semiconductingpolymers on meta-stable (swellable) polymer dielectrics.^(1,7-9). As aresult of the quasi-one-dimensional transport pathways of chargecarriers along the backbone, charge transport in polymer semiconductorsis limited by their nanomorphology¹⁰. Structural disorder, arising fromthe high degree of conformational freedom of polymer chains (causingchain folding, torsion, and structural defects) leads to electroniclocalization¹¹. Thus, highly aligned polymer packing with minimizedstructural disorder is needed for achieving high mobility in conjugatedpolymers. Our recent progress toward this goal was reported usingnanogrooved substrates to obtain chain alignment and associatedanisotropy with resulting mobilities of 50 cm² V⁻¹ s⁻¹ (and even higher)for regioregular polymers¹²⁻¹⁴, includingpoly[4-(4,4-dihexadecyl-4H-cyclopenta[1,2-b:5,4-b′]dithiophen-2-yl)-alt-[1,2,5]thiadiazolo-[3,4-c]pyridine](PCDTPT; see FIG. 1a for the molecular structure). By employing a“sandwich” casting system comprising oleophilic nanogrooved dielectricsand glass spacers, semiconducting polymers were oriented parallel to thenanogrooves by capillary action¹⁴. The aligned polymer thin filmsexhibited strong anisotropy, showing more than 10-fold higher mobilityfor transport along the direction of alignment than perpendicular to thealignment. This concept of directed self-assembly of semiconductingpolymers using nanogrooved substrates is also promising for achievinghigh mobility in solution-processed flexible OFETs.

Despite such high mobility, however, one finds that it is challenging todevelop high mobility flexible OFETs using the capillarity of polymersolutions onto nanogrooved substrates because the nanogrooved SiO₂dielectric, which is a key component for inducing chain alignment, is abrittle material¹⁵. Therefore, a strategy for achieving high polymeralignment and high mobilities using a nanogrooved polymer dielectric,which is chemically and mechanically stable, is needed for thedevelopment of high mobility flexible OFETs. One or more embodiments ofthe present invention satisfy this need.

SUMMARY OF THE INVENTION

One or more embodiments of the present invention disclose an OFET,comprising a flexible structure, the flexible structure including asubstrate; a channel on or above the substrate, the channel comprisingone or more semiconducting polymers and the semiconducting polymers eachcomprising a main chain axis aligned with the channel; a source contactand a drain contact making contact to the semiconducting polymers, thesource contact and the drain contact separated by a length of thechannel; a gate contact; and a dielectric between the gate contact andthe semiconducting polymers.

The OFET can be embodied in many ways, including, but not limited to,the following.

1. The substrate can be a plastic substrate, a polymer substrate, aglass substrate, or substrate comprising a material that is flexible fora bending radius as small as 4 millimeters (mm) or as small as 5 mm. Forexample, the substrate can be at least one film or foil selected from apolyimide film, a polyether ether ketone (PEEK) film, a polyethyleneterephthalate (PET) film, a polyethylene naphthalate (PEN) film, apolytetrafluoroethylene (PTFE) film, a polyester film, a metal foil, aflexible glass film, and a hybrid glass film.

2. The semiconductor films can exhibit varying degrees of order. Thesemiconductor polymers in any of the previous embodiments can beoriented along one or more nanogrooves (e.g., having a depth of 6nanometers (nm) or less and a width of 100 nm or less) in the substrateor dielectric.

3. The dielectric in any of the previous embodiments 1-2 can comprisethe one or more nanogrooves orienting the main chain axes along an axisdirection of the nanogrooves parallel to the length/alignment directionof the channel. Thus, one or more embodiments of the present inventionfurther disclose a facile strategy for controlling the nanomorphology ofsemiconducting polymers on surface-modified (nano-grooved) polymerdielectrics.

4. In any of the preceding embodiments 1-3, the nanogrooves can benanoimprinted into the dielectric or the substrate.

5. In any of the preceding embodiments 1-4, the semiconducting polymerscan be cast from a solution onto the dielectric.

6. The dielectric in any of the previous embodiments 1-5 can increase orenhance mobility (e.g., saturation hole mobility) and/or alignment ofthe semiconducting polymers, as compared to the without the nanogroovesand/or the dielectric (e.g., the saturation mobility can be increased toat least 11.0 cm² V⁻¹ s⁻¹ or increased by a factor of at least 10). Inone or more examples using nanogrooved polymer substrates covered withsilicon dioxide (SiO₂) with finely adjusted thicknesses, oriented andaligned semiconducting polymer thin films were obtained, and the OFETsfabricated from the oriented semiconducting polymer, PCDTPT, yieldedhole mobilities as high as 20.2 cm² V⁻¹ s⁻¹ as a result of thecombination of structural order and diminished trap densities at thepolymer/dielectric interface. Moreover, the flexible “plastic” FETsdemonstrated excellent mechanical stability under severe bendingconditions. These results represent important progress forsolution-processed flexible OFETs, and demonstrate that high-mobilitysemiconducting polymers can be aligned by chemically stable softnanostructures through directed self-assembly.

The dielectric in any of the previous embodiments 1-6 can have manydifferent dielectric structures. The dielectric can be a single polymerdielectric layer, a bilayer comprising SiO₂ on a polymer dielectric (forexample, the silicon dioxide can be on a surface of PVP, thereby formingthe dielectric comprising a dielectric bilayer of SiO₂ on PVP), abilayer comprising an alkylsilane or arylsilane SAM layer on SiO₂, or amultilayer comprising SiO₂ on a polymer and an alkylsilane or arylsilaneSAM layer on the SiO₂.

8. The dielectric in any of the previous embodiments 1-7 can reduceswelling of the nanogrooves resulting from solution casting.

9. In any of the previous embodiments 1-8, the dielectric can be a gatedielectric.

10. In any of the preceding embodiments 1-9, the semiconducting polymerscan have the compositions and structures disclosed herein (including,but not limited to, any of the examples described in Block 504 of FIG.5).

11. In any of the preceding embodiments 1-10, the alignment, thecomposition and/or structure of the dielectric, the composition and/orstructure of the semiconducting polymers, the composition and/orstructure of the substrate, the composition and/or structure of theelectrodes, can be effective to achieve:

-   -   π-π stacking of the semiconductor polymers characterized by a        peak having a full width at half maximum of 2 nm⁻¹ or less, as        measured by grazing incidence wide-angle X-ray scattering        (GIWAXS); and/or    -   the OFET having a field effect saturation hole mobility that        changes by 10% or less under tensile and/or compressive bending        (e.g., after 1000 cycles of tensile and/or compressive bending)        of the substrate with a bending radius down to 4 mm; and/or    -   the OFET having at least four times smaller turn on voltage        (V_(ON)) shift as compared to the device without the dielectric        layers, when a source-drain bias (V_(DS)) is varied from −80 V        to −1 V; and/or    -   the semiconducting polymers disposed in one or more fibers (the        main axis along a long-axis of the fiber and the π-π stacking of        the polymer chains in a direction along the short-axis of the        fiber), the fibers continuously aligned with the alignment        direction (or the axis direction of the nanogrooves) for a        distance including, e.g., 2 micrometers. In one or more        examples, the fibers are in bundles having a diameter of at        least 50 nm and/or the fibers at least partially lie in        nanogrooves; and/or    -   a tilt, S, of the main-chain axis relative to a normal of the        substrate less than or equal to −0.35 and/or an orientation, η,        of the polymer main-chain axis relative to the alignment        direction greater than or equal to 0.96.

Also disclosed is a method of fabricating an OFET, comprisingfabricating a flexible structure, including providing a flexiblesubstrate; depositing a dielectric on or above the substrate; castingone or more semiconducting polymers from a solution onto the dielectricon or above the flexible substrate; forming a source contact and a draincontact; and depositing a gate contact; wherein the OFET comprises: thedielectric between the gate contact and the semiconducting polymers, thesource contact and the drain contact separated by a length of a channelcomprising the one or more semiconducting polymers, the source and draincontact each making ohmic contact to the semiconducting polymers, andthe semiconducting polymers each having a main chain axis aligned withan alignment direction in the channel.

BRIEF DESCRIPTION OF THE DRAWINGS

Referring now to the drawings in which like reference numbers representcorresponding parts throughout:

FIGS. 1a-1g illustrate device structure, materials, and Atomic ForceMicroscope (AFM) images of textured substrates. FIG. 1a and FIG. 1billustrate schematic device architecture. FIG. 1c illustrates molecularstructures of the PCDTPT, PVP, and HDA. FIGS. 1d-1g illustrate AtomicForce Microscope (AFM) images and corresponding line profiles of then-SiO₂ (FIG. 1d ), OrmoStamp® (FIG. 1e ), n-PVP (FIG. 1f ), andn-PVP/SiO₂ (FIG. 1g ) substrates. The SiO₂ thickness is approximately 2nm. The inset image in FIG. 1f represents the AFM image of the f-PVPsubstrate (7 μm×7 μm), showing smooth surface (RMS<0.5 nm).

FIGS. 2a-2e illustrate transistor characteristics of PCDTPT thin filmsfabricated on various dielectrics. FIG. 2a and FIG. 2b show transfercurves of the device with the f-PVP, n-PVP, f-PVP/SiO₂, and n-PVP/SiO₂(2 nm thick) dielectrics taken at drain source voltage (V_(DS))=−80 V(having width W=1000 micrometers (μm) and Length L of 200 μm). FIG. 2cshows output curves of the device with the n-PVP/SiO₂ dielectric takenat various gate-source voltage (V_(GS)) from 10 V to −2 V. FIG. 2d showsthe mobility distribution for 30 devices with the n-PVP/SiO₂dielectrics. Average mobility is 15.7±2.2 cm² V⁻¹ s⁻¹. FIG. 2e showsmobility variations of the devices with the n-PVP/SiO₂ dielectrics withvarying thicknesses of SiO₂ layers. I_(ds) is drain source current inAmps (A).

FIGS. 3a-3i illustrate Atomic Force Microscope (AFM) and grazingincidence wide-angle X-ray scattering (GIWAXS) data, and electric-fieldand temperature dependent mobilities of devices fabricated according toone or more embodiments of the present invention. FIG. 3a and FIG. 3bshow AFM topographic images of the bottom surfaces of the PCDTPT thinfilms deposited on the n-PVP (FIG. 3a ) and n-PVP/SiO₂ (2 nm thick)(FIG. 3b ) substrates, wherein the scale is 10 μm×10 μm. FIGS. 3c-d showschematic illustrations of two deposited thin films prepared on then-PVP (FIG. 3c ) and n-PVP/SiO₂ (2 nm)(FIG. 3d ) substrates. FIGS. 3e-3fshow 2D GIWAXS patterns of the PCDTPT thin films fabricated onto theSi/n-PVP (FIG. 3e ) and Si/n-PVP/SiO₂ (2 nm) (FIG. 3f ) substrates. FIG.3g shows GIWAXS line profiles of the PCDTPT thin films using constant,grazing incident angle with in-plane scattering geometry. The intensityis normalized to incident photon energy. q denotes the scatteringvector. FIG. 3h shows turn on voltage (V_(ON)) variations as a functionof various source-drain bias (V_(DS)) taken from the transfer curvesshown in Supplementary Fig. S5 in the Supplementary Information³¹. Thelines indicate polynomial fit curves. FIG. 3i shows temperaturedependent mobilities of the devices with the n-PVP and n-PVP/SiO₂ (2 nm)dielectrics. The numbers indicate the activation energy (E_(A)) valuesfor each device. The lines indicate exponential fit curves.

FIGS. 4a-4h illustrate characterization of flexible transistorsfabricated by doctor blade casting according to one or more embodimentsof the invention. FIG. 4a shows transfer curves and FIG. 4b shows outputcurves of the flexible device with the n-PVP/SiO₂ (2 nm) dielectricfabricated on transparent polyimide substrate (W/L=1,000/200 μm). Theinset in FIG. 4a represents the cross-section of the flexible devicearchitecture. FIGS. 4c-4d show schematic illustrations of tensile (FIG.4c ) and compressive bending (FIG. 4d ) and FIGS. 4e-4f showcorresponding photographs of flexible devices in the measurement systemduring tensile bending (FIG. 4e ) and compressive bending (FIG. 4f ).FIG. 4g shows mobility variations as a function of bending distance (d)under tensile and compressive bending stress. FIG. 4h shows mobilityvariations with increasing number of bending cycles (bending radius, r:4 mm). Error bars denote standard deviation.

FIG. 5 illustrates a method of fabricating a device, according to one ormore embodiments of the invention.

DETAILED DESCRIPTION OF THE INVENTION

In the following description of the preferred embodiment, reference ismade to the accompanying drawings which form a part hereof, and in whichis shown by way of illustration a specific embodiment in which theinvention may be practiced. It is to be understood that otherembodiments may be utilized and structural changes may be made withoutdeparting from the scope of the present invention.

Technical Description Examples

FIG. 1a , FIG. 1b , and FIG. 1c illustrate an OFET that can comprise aflexible structure, including a substrate 100 (e.g., polyimide orglass), a channel 102 (comprising semiconducting polymers PCDTPT) on orabove the substrate 100, a source contact (S) and a drain contact (D) tothe semiconducting polymers, a gate contact (G); and a dielectric (e.g.,SiO₂ on n-PVP) between the gate contact G and the semiconductingpolymers. FIG. 1a further illustrates the source contact S and the draincontact D are separated by a length L of the channel. FIGS. 1a-1cfurther illustrate the semiconducting polymers each comprise a mainchain axis 104 aligned with or parallel to an alignment direction 106(e.g., along/parallel to the length L) in the channel 102. In theembodiments illustrated in FIGS. 1a-1c , the contacts S, D, and G aregold (Au) contacts (but other materials can also be used) and thedielectric (SiO₂ and n-PVP) comprises nanogrooves 108 orienting the mainchain axes 104 along an axis direction 106 of the nanogrooves parallelto the length L.

Embodiments of the present invention illustrated in FIGS. 1a-1c achieveOFETs with the highest mobilities of 20.2 cm² V⁻¹ s⁻¹ and 11.0 cm² V⁻¹s⁻¹ fabricated on rigid and plastic substrates, respectively, showingexcellent mechanical flexibility. These high mobilities were achieved byaligning PCDTPT onto SiO₂-covered nanogrooved polymer dielectricsthrough directed self-assembly along the nanogrooves. (FIG. 1a ). Thus,one or more embodiments of the present invention align thesemiconducting polymers through a directed self assembly that iscritical to the solution-casting process.

Nanogrooved polymer dielectrics were prepared by thermally-assistednanoimprint lithography (T-NIL)^(1,16,17). Poly(4-vinylphenol)crosslinked with 4,4′-(hexafluoroisopropylidene)diphthalic anhydride(PVP:HDA, see FIG. 1a for their molecular structures) was used asdielectric material due to higher solvent resistance and low surfaceroughness^(18,19). A nanogrooved SiO₂ (henceforth referred to as n-SiO₂)substrate was used as a master mold to fabricate the photo-crosslinkableOrmoStamp® stamping/imprinting material. All fabrication details can befound in the Example Methods section and Supplementary Information³¹.

AFM images of textured substrates produced in the T-NIL process aredisplayed in FIGS. 1b-1e . The inventors emphasize that nanogrooves onthe nanogrooved PVP:HDA (n-PVP) are very clear and uniform over thewhole substrate (12.2 mm×7.7 mm) even with an additional 2-nm-thick SiO₂layer (FIGS. 1f and 1g ), and appear to be identical to those on then-SiO₂ master (FIG. 1d ). Embodiments of the present invention alsoperformed T-NIL using polydimethylsiloxane (PDMS)^(1,16,17) andhard-PDMS^(1,17,21) as working stamps instead of the OrmoStamp®, but noclear nanostructures were seen on the PVP:HDA thin films in theseexamples (see Supplementary Fig. S2 in the Supplementary Information³¹).Due to the well-established nanogrooves on the n-PVP substrate (FIG. 1f), enhanced mobility is anticipated for the devices with the n-PVPdielectrics.

Accordingly, OFETs were fabricated by casting the PCDTPT ontoglass/Au/n-PVP substrates with pre-patterned Ni/Au source and drainelectrodes in the sandwich casting system¹⁴ to complete the bottom gatebottom contact (BGBC) geometry (see FIG. 1a ). FIGS. 2a-2e representtransistor characteristics of OFETs with various combinations ofdielectrics (flat PVP:HDA (f-PVP), nanogrooved PVP:HDA (n-PVP),f-PVP/SiO₂, and n-PVP/SiO₂). Transfer curves of the OFETs are displayedin FIGS. 2a and 2 b.

The field-effect mobilities can be extracted in the saturation regimefrom the following equation, I_(DS)=(W/2L)Cμ(V_(GS)−V_(T))², where, W isthe channel width (1,000 μm), L is the channel length (200 μm), C is thegate dielectric capacitance per unit area, μ is the carrier mobility,I_(DS) is the drain-source current, V_(GS) is the gate-source voltage,and V_(T) is the threshold voltage. The output curves at high V_(GS) donot show saturation (Supplementary Fig. S3 in the Supplementaryinformation³¹), but show clear saturation at low V_(GS) as shown in FIG.2c . Thus, accurate mobilities using the formula described above can beobtained only in the low V_(GS) regime (V_(GS)−V_(T)≤5 V). Additionally,low hysteresis is observed for all devices with forward and reversesweeping of V_(GS), indicating that a low density of shallow traps ispresent at the polymer/dielectric interface. Contrary to expectationsthat the PCDTPT films on the n-PVP dielectric will lead to enhancedmobility, the device with the n-PVP dielectric produced a nearlyidentical transfer curve and low mobility (μ=1 cm² V⁻¹ s⁻¹) comparedwith those of the device with the f-PVP dielectric (FIGS. 2a and 2b ).This is likely to be associated with the failure of the formation ofcrystalline PCDTPT seeds in the nanogrooves on the n-PVP dielectric,presumably due to the swelling of the n-PVP surface in thesolution-casting process. Although nanogrooves on the n-PVP substratesare stable with organic solvent treatment (see Supplementary Fig. S4 inthe Supplementary Information³¹), it is reasonable to assume that only3-nm-height nanogrooves on the n-PVP dielectric are difficult tomaintain in contact with solvent (here, chlorobenzene) during thefilm-forming process⁷, thereby leading to limited space for chainalignment (seed formation), considering that the lamellar packingdistance for PCDTPT (edge-on orientation) is approximately 2.51 nm²².

Based on this hypothesis, an ultrathin SiO₂ layer was introduced byatomic layer deposition (ALD) on top of the n-PVP dielectric to preventthe swelling of nanogrooves. With a 2-nm-thick SiO₂ layer on top of then-PVP dielectric, the mobility increased by a factor of 20 with thehighest mobility of 20.2 cm² V⁻¹ s⁻¹, demonstrating low contactresistance as seen by the output curves (FIG. 2c ). The inventors notethis mobility is obviously higher than that (μ=1.5 cm² V⁻¹ s⁻¹) of thedevice with the f-PVP/SiO₂ dielectric, and thus is attributed to higherchain alignment by the guidance of nanogrooves on the n-PVP/SiO₂substrate. The inventors also emphasize that such device performance ishighly reproducible throughout the whole device area, showing a narrowdistribution of mobility for 30 devices with the n-PVP/SiO₂ dielectricswith an average mobility of 15.7 cm² V⁻¹ s⁻¹ (FIG. 2d ). This resultindicates that shallow nanogrooves with a depth below 3 nm can besuccessfully fabricated throughout the whole device area by T-NIL, andcan lead to efficient chain alignment of overlying semiconductingpolymers. More interestingly, mobility is gradually increased as SiO₂thickness increases up to approximately 2 nm, and saturates with thickerSiO₂ layers, as shown in FIG. 2e . The results in the low thicknessregime (<2 nm; marked with a rectangle 200) are particularly interestingbecause the mobility is steadily enhanced with small increases in SiO₂thickness (approximately 0.5 nm interval), showing an increase inmobility over one order of magnitude. Because contact resistancedifference for both devices with the n-PVP and n-PVP/SiO₂ dielectrics isnegligible owing to the same channel dimensions (W/L=1,000/200 μm) andsource/drain electrodes (Au), such increased mobility could be explainedby gradually enhanced polymer alignment with increasing SiO₂thicknesses.

In order to confirm the hypothesis that introduction of SiO₂ can enhancepolymer alignment at the polymer/dielectric interface, AFM was performedto examine and compare the nanomorphology on the bottom surfaces ofpolymer films prepared on the n-PVP and n-PVP/SiO₂ substrates. Detailsfor sample preparation can be found in Supplementary Information³¹.FIGS. 3a and 3b show AFM topographic images of the bottom surfaces ofPCDTPT thin films (taken from areas in the channels used for transistorcharacteristics shown in FIG. 2). The film prepared on the n-PVPsubstrate exhibits obviously featureless surfaces. Interestingly,polymers tend to be aligned along the nanogrooves in some areas(rectangle 300 in FIG. 3a )—presumably in deep nanogrooves formed bydiamond aggregates during the master mold fabrication, but appear to bediscontinuous (see also Supplementary Fig. S5, in the SupplementaryInformation³¹, for the magnified AFM image). By contrast, the filmprepared on the n-PVP/SiO₂ substrate shows uniaxial nanostructures,aligned parallel to the nanogrooves. These oriented nanostructures arepresent throughout the bottom surface with dimensions comparable tonanogrooves on the n-PVP/SiO₂ substrates (see FIG. 1e ), demonstratingour hypothesis that SiO₂ on top of the n-PVP substrate allows polymersto have ample space in the nanogrooves allotted for chain alignment bypreventing the swelling of the n-PVP surface, as illustrated in FIG. 3d(in contrast to FIG. 3c without the SiO₂).

The crystalline structure and orientation of PCDTPT thin films onvarious substrates were further characterized through grazing incidencewide-angle X-ray scattering (GIWAXS) experiments. FIGS. 3e and 3f showtwo dimensional (2D) GIWAXS images for PCDTPT thin films prepared onn-PVP and n-PVP/SiO₂ (2 nm) substrates, respectively, in the sandwichcasting system. The observed diffraction pattern is consistent withprevious reports^(14,22). However, a strong amorphous halo is observeddue to scattering from the PVP layer from approximately q=10 to 20 nm⁻¹,where q is the scattering vector. The strong “out-of-plane” lamellaralkyl stacking (h00) reflections and the “in-plane” π-π reflection atq˜17.8 nm⁻¹ indicate that the crystallites have a preferential “edge-on”orientation. The characteristic π-π packing distance, d_(π-π), isapproximately 0.35 nm for both films. The π-π stacking peak is moreclearly seen through the comparison of the normalized line-profilesalong the q_(xy) (in-plane) direction, shown in FIG. 3g . Although theπ-π stacking peak is also observed for the PCDTPT thin film prepared onn-PVP substrate due to “discontinuous” alignment described above (seeFIG. 3a ), the enhanced carrier mobility could be explained by“continuous” uniaxial alignment of PCDTPT along nanogrooves on then-PVP/SiO₂ substrates.

To assess how polymer alignment affects carrier transport in OFETs, oneor more embodiments of the present invention performed electric-fielddependent transconductance measurements for the devices with the n-PVPand n-PVP/SiO₂ dielectrics. Transfer curves were taken with varyingsource-drain bias (V_(DS)) from −80 V to −1 V, and are shown inSupplementary Fig. S6 in the Supplementary Information³¹. To comparetrap-assisted turn-on voltage (V_(ON)) shifts for both devices, theV_(ON) values extracted from the transfer curves are plotted as afunction of decreasing V_(DS) in FIG. 3h . Notably, four times largerV_(ON) difference (12 V) is observed for the device with the n-PVPdielectric compared with that (3 V) of the device with the n-PVP/SiO₂dielectric. Since a large V_(ON) shift can be attributed to increasedtrap density²³, the reduced V_(ON) shift for the films prepared on then-PVP/SiO₂ substrate indicates mitigated trap density for aligned PCDTPTthin films prepared on the n-PVP/SiO₂ substrate.

To further investigate the effect of alignment on reducing trap densityat the polymer/dielectric interface, temperature dependent mobilitymeasurements were carried out for devices with the n-PVP and n-PVP/SiO₂dielectrics. Mobility variations as a function of reciprocal temperature(1/T) are displayed in FIG. 3i , as extracted in the temperature rangefrom 130 Kelvin (K) to 240 K. The mobility is thermally activated andfollows a simple Arrhenius relationship²⁴. The activation energy(E_(A)), the energy difference between the trap state and the conductionband edge, can be calculated from μ_(eff)≈μ₀ exp(−E_(A)/kT)²⁴, whereμ_(eff) is the effective mobility, μ₀ is the free carrier mobility, k isthe Boltzmann constant, and T is the temperature. Relatively lower E_(A)(47 meV) is observed for the device with the n-PVP/SiO₂ dielectric,compared with that (57 meV) of the device with the n-PVP dielectric. Theinventors note that this low E_(A) is consistent with the previousresult¹², and is similar to the values for other high-mobilitysemiconducting polymers²⁴. The low E_(A) also indicates that a low trapdensity is present in the aligned PCDTPT thin film prepared on then-PVP/SiO₂ substrate.

It is noteworthy that surface modification with SiO₂ can change surfaceenergy of the n-PVP substrate, which is important for determiningpolymer alignment during the capillarity-mediated sandwich castingprocess¹⁴. In particular, passivation of the substrates with aself-assembled monolayer (here, n-decyltrichlorosilane; n-DTS) canfurther increase the difference in surface energies between n-PVP andn-PVP/SiO₂ substrates due to a different density of reaction sites(i.e., hydroxyl group) on the surfaces. However, contact anglemeasurement results showed similar surface energies for both the n-PVP(13 mN m⁻¹) and n-PVP/SiO₂ (10 mN m⁻¹) substrates after the n-DTSpassivation (Supplementary Fig. S7 in the Supplementary Information³¹).Such a small difference is not sufficient to explain the increases inpolymer alignment and mobility by more than one order of magnitude.

To confirm the feasibility of employing the n-PVP/SiO₂ thin films inreal flexible electronics, flexible OFETs were fabricated ontotransparent polyimide substrates using the same device configuration(BGBC) described above (see FIG. 4a ). The inventors note that PCDTPTthin films on flexible substrates were deposited by doctor blade castinginstead of the sandwich casting because (1) flexible substrates are notsuitable for sandwich casting geometry¹⁴ and (2) doctor blade casting isa more promising film casting technique for real roll-to-rollfabrication of flexible electronics³. As extracted from the transfercurve shown in FIG. 4a , the flexible OFET produced a hole mobility,μ=11.0 cm² V⁻¹ s⁻¹, and showed clear saturation of the output curves(FIG. 4b ). The inventors note that this mobility is potentiallycomparable to the highest mobility (μ=20.2 cm² V⁻¹ s⁻¹) of the rigiddevice, considering that the doctor blade cast PCDTPT thin film on then-SiO₂ substrate yielded relatively lower carrier mobility (μ≈27.0 cm²V⁻¹ s⁻¹) compared with that (μ≈56.0 cm² V⁻¹ s⁻¹) of the sandwich castcounterpart (Supplementary Fig. S8 in the Supplementary Information).

Bending stability is important to ensure useful applications of theflexible OFETs according to one or more embodiments of the presentinvention. Accordingly, embodiments of the present invention measureddevice performances under various bending conditions (tensile andcompressive bending) and continuous bending stress. FIGS. 4c-4f showsschematic illustrations of tensile and compressive bending as well ascorresponding photographs of flexible devices in the measurement system.Mobility variations as a function of bending distance are displayed inFIG. 4g . The inventors note that mobilities are almost constant undertensile and compressive bending with a bending distance as small as 5mm. Notably, this flexible device showed no significant decrease inmobility under continuous bending up to 1,000 cycles of repetitivebending tests (FIG. 4h ). Despite the high Young's modulus of SiO₂employed¹⁵, such high bending stability could be explained by lowbending strain applied to the SiO₂ layer owing to the extremely lowthickness (ca. 2 nm) of the SiO₂ layer, which can be estimated from thesimple relationship: ε≈t/2r, where ε is the bending strain, t is thetotal film thickness, and r is the bending radii²⁵. These resultsdemonstrate that the n-PVP/SiO₂ thin film could be a useful componentfor flexible electronics.

From the perspective of fabrication manner, such polymer/polymer(dielectric) interfaces in OFETs can also be modified withsolution-processed dielectric materials (such aspolymethylsilsesquioxane (PMSQ)⁹, amorphous alumina²⁶, and yttriumoxide²⁷) as interfacial layers to prevent the interlayer mixing orswelling at the polymer/dielectric interface during the solution-castingprocess. However, there exists no possible casting method from solutionto effectively cover the nanogrooved polymer dielectrics withoutdestroying the shallow nanogrooves with a depth below only 3 nm (seeFIG. 1d ). Alternatively, nanoimprinting with more solvent-resistant(i.e., extremely crosslinked and pinhole free) polymer dielectrics couldbe the best alternative (to the bilayer dielectric according to one ormore embodiments of the present invention) for achieving high mobilityof flexible OFETs fabricated by all-solution-processing. In thatcontext, one or more embodiments of the present invention introducedseveral polymer systems including thermally crosslinkedpoly(vinylalcohol) with ammonium dichromate (PVA:AD)²⁸ and poly(methylmethacrylate) (PMMA)²⁹, and photo-crosslinked poly(vinyl cinnamate)(PVCN)³⁰ instead of the PVP:HDA, but nanostructure and devicefabrications were not successful due to the relatively lower thermalstability (i.e., low glass transition temperature, T_(g)) and solventresistance of the polymer dielectrics used. However, one finds thatpolymers with moderately high T_(g) (100-160° C.) are required forachieving high fidelity nanogrooves on nanoimprinted polymers andresulting high mobility even after thermal curing of dielectric polymersand semiconducting polymers for better device performance.

By demonstrating that nanomorphology of semiconducting polymers can betailored, by facile interface engineering of nanoimprinted polymerdielectrics, for achieving high polymer alignment, and that the alignedpolymer thin films lead to high mobility as well as excellent bendingstability in flexible OFETs, the results achieved using one or moreembodiments of the present invention suggest that polymer-based flexibleOFETs are promising for realizing high-performance flexible electronics.

Example Methods

The following methods were used for fabricating the devices illustratedin FIG. 1a-1g and used to obtain the measurements illustrated in FIGS.2-4.

Fabrication of Master Mold.

As a master mold, a nanogrooved SiO₂ (henceforth referred to as n-SiO₂)substrate was prepared by rubbing a Si/SiO₂ substrate (an n⁺⁺Si (500 μmthick)/SiO₂ (300 nm thick) substrate from International Wafer ServicesCo.) with a diamond lapping disc with particle sizes of 100 nm (AlliedHigh Tech Products Inc.) as described in detail in a previous report¹².

Fabrication of OrmoStamp.

The photo-crosslinkable OrmoStamp® was chosen as the stamping materialbecause of its high hardness²⁰, which is required for achievinghigh-fidelity nanostructures on polymer substrates. The OrmoStamp®(MicroChem Co.) liquid (30 μL) was mounted on the n-SiO₂ substratepassivated with a perfluorodecyltrichlorosilane (FDTS) self-assembledmonolayer (as an anti-sticking layer) using molecular vapor depositionsystem (MVD 100E, Applied Microstructures, Inc.) after oxygen plasmatreatment (PEII plasma etching system, Technics Inc.) for 10 minutes(min) at 100 Watts (W) Radio Frequency (RF) plasma power with continuousoxygen flow (300 mTorr), and was subsequently covered by the ultrasmoothglass substrate. Note that the glass substrate was ultraviolet/ozonetreated for 15 min, and was covered by the OrmoPrime08® (MicroChem Co.)as an adhesive layer by spin casting at 4,000 rpm for 60 seconds (s)followed by baking at 150° C. for 5 min, prior to being mounted on theOrmoStamp® droplet. Then, the OrmoStamp® in between the n-SiO₂ and glasssubstrates was exposed to ultraviolet light (wavelength˜365 nm) for 10min for crosslinking. The nanostructured OrmoStamp® on glass substrate,as a positive replica of the n-SiO₂ master mold, was cured at 130° C.for 30 min for hardening of nanostructures, and was treated with theFDTS anti-sticking layer.

Preparation of Nanogrooved Polymer Dielectric.

A flat PVP:HDA (f-PVP) layer was spin cast from a propylene glycolmonomethyl ether acetate (PGMEA, Sigma-Aldrich Co.) solution with atotal concentration of 100 mg mL⁻¹ of PVP:HDA (10:1 by weight,Sigma-Aldrich Co.) to form a 400-nm-thick thin film on ultrasmooth glasssubstrates (Corning Eagle XG wafer, RMS<0.5 nm, MTI Co.). Then, theOrmoStamp® working stamp (a positive replica of the master mold(n-SiO₂)) was placed onto the vacuum-dried spin cast flat f-PVP thinfilms in the nanoimprinting system (NX2000, Nanonex Inc.) atconstant/continuous heat/temperature (150° C.) and pressure (100 PSI)for 2 min to fabricate nanogrooved PVP:HDA (referred to as n-PVP). Then-PVP thin films were then cured at 105° C. for 1 hour (h) to promotethe crosslinking reaction. Nanostructures on each substrate wereconfirmed by obtaining tapping mode AFM topographic images using anAsylum MFP-3D Standard System in air.

Deposition of Interfacial Layer.

The crosslinked f-PVP and n-PVP thin films were loaded in theplasma-enhanced FlexAL Atomic Layer Deposition (ALD) system (OxfordInstruments Inc.) for the deposition of SiO₂ at 120° C. with a desiredthickness from 0.5 nm to 10 nm. The SiO₂ thickness was measured by usinga Woolam Spectroscopic Ellipsometer (M2000DI VASE, J. A. Woolam Co.) forsimultaneously deposited SiO₂ thin films on Si substrates during the ALDprocess.

Device Fabrication and Characterization.

The OFETs were fabricated onto ultrasmooth glass and polyimide (NeopulimL-3450, 100 μm in thickness, Mitsubishi Gas Chemical Company Inc.)substrates with the BGBC geometry. The dielectric layers (f-PVP, n-PVP,f-PVP/SiO₂, and n-PVP/SiO₂) were prepared on top of Ni (10 nm)/Au (100nm) gate electrodes on the ultrasmooth glass substrates as describedabove, with a thickness of approximately 400 nm and measured capacitancevalues of approximately 1.0×10⁻⁴ F m⁻² (Supplementary Fig. S9 in theSupplementary Information³¹). The capacitance data were collected byusing a 4192A LF impedance analyzer (Hewlett Packard Inc.). The Ni (5nm)/Au (50 nm) source and drain electrodes were patterned on thedielectrics through the Si shadow mask. All metal electrodes weredeposited by electron beam evaporation at 7×10⁻⁷ Torr. Afterultraviolet/ozone treatment of the SiO₂-covered dielectrics (f-PVP/SiO₂and n-PVP/SiO₂) for 10 min, the substrates were passivated with then-DTS (Gelest Inc.) in toluene solution (1% by volume) at 80° C. for 20min in air. The PCDTPT (1-Material Inc.) was then cast from achlorobenzene solution (0.25 mg mL⁻¹) for approximately 5 h in thesandwich casting geometry in a nitrogen filled glove box¹⁴. The deviceswere then cured at 190° C. for 3 min prior to measurements, and weretested using a probe station (Signatone Co.) in a nitrogen filled glovebox. Data were collected by a Keithley 4200 system.

GIWAXS Measurement.

The samples were prepared onto the n-PVP and n-PVP/SiO₂ thin films onnative oxide Si substrates. GIWAXS measurements were performed atbeamline 11-3 at the Stanford Synchrotron Radiation Lightsource (SSRL)with an X-ray wavelength of 0.9752 Å, at a 400 mm sample to detectordistance. Samples were scanned for 300 s in a He environment at anincident angle of 0.10°. The measurements were calibrated using a LaB6standard.

Process Steps

FIG. 5 is a flowchart illustrating a method for fabricating asemiconducting polymer or organic device. The method can comprise thefollowing steps.

Block 500 represents obtaining/providing and/or preparing a (e.g.,flexible and/or swellable) substrate. The flexible substrate can beplastic, polymer, metal, or glass substrate. In one or more embodiments,the flexible substrate is at least one film or foil selected from apolyimide film, a polyether ether ketone (PEEK) film, a polyethyleneterephthalate (PET) film, a polyethylene naphthalate (PEN) film, apolytetrafluoroethylene (PTFE) film, a polyester film, a metal foil, aflexible glass film, and a hybrid glass film.

The step can comprise forming a coating (e.g., a dielectric coating) orone or more dielectric layers, on the substrate. The dielectric layerscan comprise silicon dioxide, a polymer (e.g., PVP) dielectric layer, ormultiple dielectric layers (e.g., a bilayer dielectric). The dielectriclayers can be solution coated on the substrate. A single polymerdielectric layer may be preferred in some embodiments (for easierprocessing, more flexibility). In one embodiment, the dielectric layerscan form a polymer/SiO₂ bilayer. In another embodiment, the dielectriclayers form a polymer dielectric/SiO₂/SAM multilayer with the SiO₂ onthe polymer and the alkylsilane or arylsilane Self Assembled Monolayer(SAM) layer on the SiO₂. In another embodiment, the dielectric layersform a SiO₂/SAM bilayer with the alkylsilane or arylsilane SAM layer onthe SiO₂. Various functional groups may be attached to the end of thealkyl groups to modify the surface property of the SAM layer.

The thickness of the coating/dielectric (e.g., SiO₂) may beadjusted/selected. For example, the thickness may be adjusted (e.g.,made sufficiently thin) depending on the composition of the dielectriclayers and the flexibility requirement. For example, in one embodiment,the dielectric layer might not include a polymer dielectric layer andstill be flexible.

The dielectric or coating can be structured or patterned to form one ormore grooves or structures (such as nanogrooves/nanostructures, e.g.,having a depth of 6 nanometers or less and/or a width of 100 nm or less)in the dielectric.

In one or more embodiments, the nanogrooves are formed bynano-imprinting (i.e., the nanogrooves are nanoimprinted into thedielectric or substrate). For example, the step of fabricating thedielectric layers can comprise nano-imprinting a first dielectric layer(e.g., PVP) deposited on the substrate; and depositing a seconddielectric layer on the nanoimprinted first dielectric layer, wherein athickness of the second dielectric layer comprising SiO₂ is adjusted.

Block 502 represents forming/depositing contacts or electrodes (p-type,n-type contacts, gate, source, and drain contacts) on the substrate. Thesource and drain contacts can comprise gold, silver, silver oxide,nickel, nickel oxide (NiOx), molybdenum, and/or molybdenum oxide, forexample. The source and drain contacts of the OFETs can further comprisea metal oxide electron blocking layer, wherein the metal can be, but isnot limited to nickel, silver or molybdenum. The gate contact (gateelectrode) can be a thin metal layer, for example, an aluminum layer, acopper layer, a silver layer, a silver paste layer, a gold layer or aNi/Au bilayer, or the gate contact can be a thin Indium Tin Oxide (ITO)layer, a thin fluorine doped tin oxide (FTO) layer, a thin graphenelayer, a thin graphite layer, or a thin PEDOT:PSS layer. The thicknessof the gate electrode may be adjusted (e.g., made sufficiently thin)depending on the flexibility requirement.

The dielectric layers deposited in Block 500 can comprise the gatedielectric (e.g., silicon dioxide). In one or more embodiments, the gatemetal is deposited on the substrate, the dielectric is deposited on thegate metal surface of the substrate to form a gate dielectric, andsource and drain contacts are deposited on the dielectric.

Block 504 represents preparing/obtaining a solution comprising one ormore semiconducting polymers. The semiconducting polymers can includesemiconducting polymers known in the art or described in one or more ofthe references cross-referenced herein.

One or more examples of the semiconducting polymers include, but are notlimited to, a copolymer with donor and acceptor repeating units.

In one or more embodiments, the semiconducting polymers comprise a(e.g., regioregular) conjugated main chain section, said (e.g.,regioregular) conjugated main chain section having a repeat unit thatcomprises a pyridine of the structure:

wherein Ar is a substituted or non-substituted aromatic functionalgroup, or Ar is nothing and the valence of the pyridine ring iscompleted with hydrogen. In one or more embodiments, the pyridine isregioregularly arranged along the conjugated main chain section.

In one or more examples, the pyridine unit has the structure:

In one or more examples, the repeat unit further comprises a dithiopheneof the structure:

wherein the dithiophene is connected to the pyridine unit (e.g., thepyridine unit having any of the structures above), each Ar isindependently a substituted or non-substituted aromatic functionalgroup, or each Ar is independently nothing and the valence of itsrespective thiophene ring is completed with hydrogen, each R isindependently hydrogen or a substituted or non-substituted alkyl, arylor alkoxy chain; and X is C, Si, Ge, N or P. In some embodiments, the Rgroups can be the same. In the dithiophene, the R comprising thesubstituted or non-substituted alkyl, aryl or alkoxy chain can be aC₆-C₃₀ substituted or non-substituted alkyl or alkoxy chain, —(CH₂CH₂O)n(n=2˜20), C₆H₅, —C_(n)F_((2n+1)) (n=2˜20), —(CH₂)_(n)N(CH₃)₃Br (n=2˜20),2-ethylhexyl, PhC_(m)H_(2m+1) (m=1-20), —(CH₂)_(n)N(C₂H₅)₂ (n=2˜20),—(CH₂)_(n)Si(C_(m)H_(2m+1))₃ (m, n=1 to 20), or—(CH₂)_(n)Si(OSi(CmH_(2m+1))₃)_(x)(C_(p)H_(2p+1))_(y) (m, n, p=1 to 20,x+y=3). Examples of dithiophene units include those illustrated in TableB (FIG. 30B) in U.S. Utility patent application Ser. No. 14/426,467,filed on Mar. 6, 2015, by Hsing-Rong Tseng, Lei Ying, Ben B. Y. Hsu,Christopher J. Takacs, and Guillermo C. Bazan, entitled “FIELD-EFFECTTRANSISTORS BASED ON MACROSCOPICALLY ORIENTED POLYMERS,”.

For example, the dithiophene unit can comprise:

In one or more embodiments, the semiconductor polymers comprisefluorinated conjugated polymer chains (e.g., the semiconducting polymercan have fluoro functionality such as an acceptor structure including aregioregular fluoro-phenyl unit). For example, the semiconductingpolymers can comprise polymer chains having a backbone including anaromatic ring, the aromatic ring comprising a side group (e.g.,fluorine) having reduced susceptibility to oxidization as compared to apyridine ring. In one or more examples, the semiconducting polymerscomprise a (e.g., regioregular) conjugated main chain section, the(e.g., regioregular) conjugated main chain section having a repeat unitthat comprises a compound of the structure:

wherein Ar is a substituted or non-substituted aromatic functionalgroup, or Ar is nothing and the valence of the ring comprising fluorine(F) is completed with hydrogen. In one or more embodiments, the ringcomprising F is regioregularly arranged along the conjugated main chainsection.

For example, the ring comprising the fluorine can have the structure:

Further examples of semiconducting polymers (including, e.g., PCDTFBT)are described and can be fabricated according to the compositions andmethods described in U.S. Provisional Patent Application No. 62/263,058,filed Dec. 4, 2015, by Byoung Hoon Lee, Ben B. Y. Hsu, Chan Luo, MingWang, Guillermo Bazan, and Alan J. Heeger, entitled “SEMICONDUCTINGPOLYMERS WITH MOBILITY APPROACHING ONE HUNDRED SQUARE CENTIMETERS PERVOLT PER SECOND,”, which application is incorporated by reference herein(see e.g., FIG. 6 and FIG. 7 and related text of U.S. ProvisionalApplication No. 62/263,058).

The semiconducting polymers (e.g., PCDTFBT) can be fabricated followingthe method(s) described in U.S. Provisional Patent Application No.62/253,975, filed Nov. 11, 2015, by Ming Wang and Guillermo Bazan,entitled “FLUORINE SUBSTITUTION INFLUENCE ON BENZO[2,1,3]THIODIAZOLEBASED POLYMERS FOR FIELD-EFFECT TRANSISTOR APPLICATIONS,”, whichapplication is incorporated by reference herein.

Further information on the donor and acceptor structures comprisingfluorine that can be used can be found in the following U.S. ProvisionalPatent Applications which are incorporated by reference herein: U.S.Provisional Patent Application No. 62/276,145, filed Jan. 7, 2016, byMichael J. Ford and Guillermo Bazan, entitled “STABLE ORGANICFIELD-EFFECT TRANSISTORS BY INCORPORATING AN ELECTRON-ACCEPTINGMOLECULE,”; U.S. Provisional Patent Application No. 62/276,145 and U.S.Provisional Patent Application No. 62/327,311, filed Apr. 25, 2016, byGuillermo Bazan and Ming Wang, entitled “NOVEL WEAK DONOR-ACCEPTORCONJUGATED COPOLYMERS FOR FIELD-EFFECT TRANSISTOR APPLICATIONS,”.

In one or more further examples, the semiconducting polymers comprise afluorophenylene unit as an acceptor, the at least one fluorophenyleneunit selected from:

The fluorinated conjugated polymer chains can further comprise thedithiophene described above, e.g., thereby comprising regioregularstructures such as Ser. No. 62/327,311:

or non-regioregular structures such as:

wherein the C₁₆H₃₃ can be other R as described above.

In one or more further embodiments of any of the examples given above,the semiconducting polymers can comprise acceptor units chosen from thefollowing (as described in U.S. Provisional Patent Application No.62/338,866, filed May 19, 2016, by Michael J. Ford, Hengbin Wang, andGuillermo Bazan, entitled “ORGANIC SEMICONDUCTOR SOLUTION BLENDS FORSWITCHING AMBIPOLAR TRANSPORT TO N-TYPE TRANSPORT,”:

wherein each Ar is independently a substituted or non-substitutedaromatic functional group, or each Ar is independently nothing and thevalence is completed with hydrogen, each R is independently hydrogen ora substituted or non-substituted alkyl, aryl or alkoxy chain.

In typical embodiments of the invention, the semiconducting polymercomprises a regioregular conjugated main chain section having n=5-5000(n is an integer) or more contiguous repeat units (e.g., having thealternating structure D-A-D-A, [D-A]_(n), or [D-A-D-A]_(n), where D is adonor unit and A is an acceptor unit). In some embodiments, the numberof repeat units is in the range of 10-40 repeats. The regioregularity ofthe conjugated main chain section can be 95% or greater, for example.

Additives and additional compositions may be added to the solution,e.g., to form a blend, e.g., as described in the U.S. Provisional PatentApplication No. 62/388,866 and U.S. Provisional Patent Application No.62/276,145 cross-referenced above.

Block 506 represents solution casting the semiconducting polymer (or afilm of the semiconducting polymer) on the dielectric layers.

Solution casting methods include, but are not limited to, inkjetprinting, bar coating, spin coating, blade coating, spray coating, rollcoating, dip coating, free span coating, dye coating, screen printing,and drop casting.

In one or more embodiments, the dielectric or dielectric layers compriseone or more (e.g., uniaxial) nanogrooves and the semiconducting polymersare oriented by the one or more nanogrooves.

The structure (e.g., nanogrooves) of dielectric layer can orient thesemiconducting polymers comprising polymer chains, e.g., so that polymerchains each have their backbone substantially parallel to a longitudinalaxis of at least one of the nanogrooves, and the conduction between thesource contact and the drain contact is along the backbones/main chainaxes in a direction of the longitudinal axis. The source and drain canbe positioned such that a minimum distance between the source contactand drain contact is substantially parallel to the longitudinal axis ofthe nanogrooves.

The nanogrooves can provide nucleation sites for growth of the polymerchains within the solution so that one or more of the polymer chainsseed and stack within one or more of the nanogrooves. The semiconductingpolymers/polymer chains are typically disposed in one or more fibers,wherein the main-chain axes of the polymer chains are aligned along thelong-axis of the fiber while π-π stacking of the polymer chains is in adirection along the short-axis of the fiber.

The dielectric layers can reduce swelling of the one or more nanogroovesresulting from the solution casting.

Block 508 represents further processing the solution cast on thedielectric layers. The step can comprise annealing/curing the solution,or allowing the solution to dry into a film.

Block 510 represents the end result, a composition of matter and/ororganic device (e.g. photovoltaic cell, light emitting device, such asan organic light emitting diode, or transistor, such as an OFET)comprising one or more semiconducting polymers processed from a solutioncast on one or more (e.g., flexible) dielectric layers of a (e.g.,flexible) substrate; and electrical contacts to the semiconductingpolymers. The semiconducting polymers can form a channel of the devicecomprising an organic field effect transistor. For example, the methodcan form a source contact and a drain contact (e.g., ohmic contact) tothe semiconducting polymers, wherein the source contact and the draincontact are separated by a length of a channel comprising the one ormore semiconducting polymers, the semiconducting polymers each having amain chain axis (e.g., uniaxially) aligned with (e.g., an alignmentdirection in) the channel; and depositing a gate contact, whereindielectric (e.g., gate dielectric) is between the gate contact and thesemiconducting polymers.

Embodiments of the present invention are not limited to the particularsequence of depositing the source, drain, and gate contacts. Forexample, OFETs according to one or more embodiments of the presentinvention can be fabricated in a bottom gate & top contact geometry,bottom gate & bottom contact geometry, top gate & bottom contactgeometry, and top gate & top contact geometry³².

In one or more embodiments, the OFET can comprise means (e.g.,nanogrooves or statutory equivalents thereof) for aligning the mainchain axes to the channel. For example, the means can align the mainchain axes to an imaginary line bounded by the source and the drain orthe means can align the main chain axes to an alignment direction in thechannel.

In other embodiments, means for aligning the semiconducting polymerscomprises a fabrication method, including, but not limited to, bladecoating, dip coating, and bar coating (or statutory equivalents thereof)of the semiconducting polymers on dielectric/substrate.

Thus, various methods can be used to achieve the desired alignment ordirected self assembly of the semiconducting polymers. In one or moreembodiments, alignment is such that conduction between the sourcecontact and the drain contact is predominantly along the backbones/mainchain axes, although charge hopping between adjacent polymers in a fiberbundle is also possible.

In one or more embodiments, the fabrication (including the semiconductorpolymers' alignment and composition, the dielectric structure andcomposition, the substrate composition, and the composition(s) andstructure(s) of the electrodes, as discussed in the sections above) aresuch that:

-   -   devices with more dielectric layers and comprising nanogrooves        increase mobility compared to devices with less dielectric        layers;    -   nanogrooves improve device mobility when dielectric layers are        otherwise the same (e.g., n-PVP/SiO₂ can increase mobility as        compared to f-PVP/SiO₂); and/or    -   the one or more dielectric layers increase mobility of the        semiconducting polymers and/or alignment of the semiconducting        polymers with one or more of the nanogrooves, as compared to the        mobility and/or alignment of the semiconducting polymer        processed using the solution casting on the nanogrooves on the        substrate without the one or more dielectric layers; and/or    -   the one or more dielectric layers increase mobility of the        semiconducting polymers and/or alignment of the semiconducting        polymers with one or more of the nanogrooves, as compared to the        mobility and/or alignment of the semiconducting polymer        processed using the solution casting on the one or more        dielectric layers without nanogrooves; and/or    -   a film/OFET comprising the semiconducting polymers has the field        effect saturation hole mobility of at least 11.0 cm² V⁻¹ s⁻¹—for        example, the dielectric layers can increase the mobility by a        factor of at least 10; and/or    -   a film/OFET comprising the semiconducting polymers has a        mobility (e.g., field effect saturation mobility) in a range of        11.0 cm² V⁻¹ s⁻¹-200 cm² V⁻¹ s⁻¹, e.g., for a source drain        voltage in a range of −80 V to −1V and a gate-source voltage in        a range of −10V to +10V; and/or    -   a mobility (e.g., field effect saturation hole mobility) of the        film/OFET changes by 10% or less under (e.g., 1000 cycles of)        tensile and/or compressive bending of the substrate with a        bending distance down to 5 mm or down to 4 mm (or a bending        radius down to/as small as 4 mm or 5 mm); and/or    -   the field effect transistor/OFET has at least four times smaller        turn on voltage (V_(ON)) shift as compared to the device without        the dielectric layers, when a source-drain bias (V_(DS)) is        varied from −80 V to −1 V; and/or    -   the π-π stacking of the semiconducting polymers is characterized        by a peak having a full width at half maximum (FWHM) of 2 nm⁻¹        or less, as measured by grazing incidence wide-angle X-ray        scattering (GIWAXS) (see for example, the FWHM of the (010) peak        in FIG. 3g having a FWHM of 2 nm⁻¹; this FWHM could be reduced        with further optimization); and/or    -   the semiconducting polymers/polymer chains are disposed in one        or more fibers, e.g., wherein the fibers are continuously        aligned with an alignment direction in the channel (e.g., a        length of the channel) for a distance including at least 2        micrometers (e.g., at least 8 micrometers, see FIG. 3(b)); for        example, one or more of the nanogrooves or structures in the        substrate/dielectric can contact and align one or more of the        fibers such that the fibers are continuously aligned with        (and/or at least partially lie within) one or more of the        nanogrooves, e.g., for a length of the nanogrooves of at least 2        micrometers (e.g., at least 8 micrometers); and/or    -   the semiconducting polymers/polymer chains are disposed/stacked        in one or more fibers, wherein the width of an individual fiber        is about 2-3 nm, and fibers on the nanostructured/nanogrooved        substrate are disposed in fiber bundles having a width of 50˜100        nm or at least 50 nm (as compared to fiber bundles having a        width between 30˜40 nm when fabricated on a non-structured        substrate); and/or    -   the semiconducting polymers form crystalline regions (and        amorphous/non-crystalline regions) in a film; and/or    -   a tilt, S, of the main-chain axis relative to a normal of the        substrate is less than or equal to −0.35 and/or an orientation,        η, of the polymer main-chain axis relative to the alignment        direction is greater than or equal to 0.96.

Thus, it is unexpectedly found that a thickness of dielectric such assilicon dioxide can be deposited on a flexible substrate, andsemiconducting polymers can be deposited on the dielectric, in order toachieve a flexible OFET. The combination of flexibility and alignment,represented by the results described herein and achieved by one or moreembodiments of the present invention, is unexpected and surprising atleast because silicon dioxide has been known to be a brittle material¹⁵.

Further information on one or more embodiments of the present inventioncan be found in reference³³.

REFERENCES

The following references are incorporated by reference herein.

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CONCLUSION

This concludes the description of the preferred embodiment of thepresent invention. The foregoing description of one or more embodimentsof the invention has been presented for the purposes of illustration anddescription. It is not intended to be exhaustive or to limit theinvention to the precise form disclosed. Many modifications andvariations are possible in light of the above teaching. It is intendedthat the scope of the invention be limited not by this detaileddescription, but rather by the claims appended hereto.

What is claimed is:
 1. An organic field effect transistor (OFET),comprising: a flexible structure, including: a substrate; a channel onor above the substrate, the channel comprising semiconducting polymersdisposed in a stack, the semiconducting polymers each comprising a mainchain axis aligned within a space having a width of 100 nanometers (nm)along an alignment direction in the channel, the alignment directiondefined by a length of the space in a direction of a length of thechannel; a source contact and a drain contact making contact to thesemiconducting polymers, the source contact and the drain contactseparated by the length of the channel; a gate contact; and a dielectricbetween the gate contact and the semiconducting polymers.
 2. The OFET ofclaim 1, wherein the substrate is a polymer substrate, metal substrate,or glass substrate.
 3. The OFET of claim 1, wherein the substrate is atleast one film or foil selected from a polyimide film, a polyether etherketone (PEEK) film, a polyethylene terephthalate (PET) film, apolyethylene naphthalate (PEN) film, a polytetrafluoroethylene (PTFE)film, a polyester film, a metal foil, a flexible glass film, and ahybrid glass film.
 4. The OFET of claim 1, wherein the dielectriccomprises one or more nanogrooves orienting the main chain axes of oneor more of the semiconducting polymers along an axis direction of thenanogrooves parallel to the alignment direction.
 5. The OFET of claim 4,wherein the dielectric has a composition and structure that increasesmobility of the semiconducting polymers, as compared to the dielectricwithout the nanogrooves.
 6. The OFET of claim 4, wherein the nanogrooveshave a depth of 6 nanometers (nm) or less and a width of 100 nm or less.7. The OFET of claim 4, wherein the nanogrooves are nanoimprinted intothe dielectric or the substrate and the semiconducting polymers are castfrom a solution onto the dielectric.
 8. The OFET of claim 1, wherein:the semiconducting polymers are disposed in one or more fibers, and thefibers are continuously aligned with the alignment direction for adistance including at least 2 micrometers.
 9. The OFET of claim 8,wherein: one or more of the dielectric layers comprise one or morenanogrooves orienting the main chain axes along an axis direction of thenanogrooves parallel to the alignment direction, and the fibers arecontinuously aligned with the axis direction for a distance including atleast 2 micrometers.
 10. The OFET of claim 1, wherein the dielectriccomprises a thickness of silicon dioxide.
 11. The OFET of claim 10,wherein the silicon dioxide is on a surface of poly(4-vinylphenol (PVP),thereby forming the dielectric comprising a dielectric bilayer of SiO₂on PVP.
 12. The OFET of claim 1, wherein the dielectric is a singlepolymer dielectric layer.
 13. The OFET of claim 1, wherein thedielectric comprises a bilayer comprising SiO₂ on a polymer dielectric.14. The OFET of claim 1, wherein the dielectric comprises a multilayercomprising SiO₂ on a polymer and an alkylsilane or arylsilane SAM layeron the SiO₂.
 15. The OFET of claim 1, wherein the dielectric comprises abilayer comprising an alkylsilane or arylsilane SAM layer on SiO₂. 16.The OFET of claim 1, wherein π-π stacking of the semiconductor polymersis characterized by a peak having a full width at half maximum of 2 nm⁻¹or less, as measured by grazing incidence wide-angle X-ray scattering(GIWAXS).
 17. The OFET of claim 1, wherein the dielectric comprises acomposition and thickness wherein the OFET has a field effect saturationhole mobility that changes by 10% or less under tensile and/orcompressive bending of the substrate with a bending radius down to 4 mm.18. The OFET of claim 1, wherein the semiconductor polymers are alignedand the dielectric has a composition and thickness such that the OFEThas at least four times smaller turn on voltage (V_(ON)) shift ascompared to the OFET without the dielectric layers, when a source-drainbias (V_(DS)) is varied from −80 V to −1 V.
 19. The OFET of claim 1,wherein the channel has a mobility in a range of 11.0 cm² V⁻¹ s⁻¹−200cm²V⁻¹ s⁻¹ for a source drain voltage in a range of −80 V to −1V and agate-source voltage in a range of −10V to +10V.
 20. A method offabricating an organic field effect transistor (OFET), comprising:fabricating a flexible structure, including: providing a flexiblesubstrate; depositing a dielectric on or above the substrate; castingone or more semiconducting polymers from a solution onto the dielectricon or above the flexible substrate; forming a source contact and a draincontact; and depositing a gate contact; and wherein the OFET comprises:the dielectric between the gate contact and the semiconducting polymers,the source contact and the drain contact separated by a length of achannel comprising the one or more semiconducting polymers, the sourceand drain contact each making ohmic contact to the semiconductingpolymers, and the semiconducting polymers disposed in a stack, each ofthe semiconducting polymers having a main chain axis aligned within aspace having a width of 100 nanometers (nm) along an alignment directionin the channel, the alignment direction defined by a length of the spacein a direction of the length of the channel.